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june 2009 doc id 15047 rev 1 1/30 AN2827 application note driver for double flash led with i2c interface introduction this application note is dedicated to the design of a flash led driver using the stcf05 device, which is a boost current mode converter with an i2c interface and internal current source. the schematic, functional description, recommendations for pcb layout and external components selection are also discussed in this application note. the stcf05 device is designed to drive two leds in series with a total forward voltage from 5.3 v to 10.2 v. figure 1. demonstration board stcf05 v3: optimized for smallest pcb area (24 mm2) figure 2. demonstration board stcf05 v2: optimized for best efficiency www.st.com
contents AN2827 2/30 doc id 15047 rev 1 contents 1 schematic description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 selection of external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 led selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4 ntc and rx resistor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 pcb design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 pcb design rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2.1 four-layer pcb with 33.54 mm2 application area using vlf4014at-1r0n2r2 coil 8 3.2.2 four-layer pcb with 23.9 mm2 application area using vls252012t-1r0n1r7 coil 11 4 internal registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 shutdown mode with ntc feature activated . . . . . . . . . . . . . . . . . . . . 15 5.3 ready mode ntc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.4 torch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.5 flash mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 status register and atn pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 reading and writing to the stcf05 r egisters through the i2c bus . . . 20 7.1 writing to a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.2 writing to multiple registers with incremental addressing . . . . . . . . . . . . 20 7.3 reading from a single register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.4 reading from multiple registers with incremental addressing . . . . . . . . . 22 8 examples of register setup for each mode . . . . . . . . . . . . . . . . . . . . . . 23
AN2827 contents doc id 15047 rev 1 3/30 8.1 example 1: 400 ma flash with 700 ms duration . . . . . . . . . . . . . . . . . . . . 23 8.2 example 2: 15 ma torch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8.3 example 3: auxiliary led running at 10 ma for 500 ms . . . . . . . . . . . . . . 25 8.4 example 4: red-eye reduction (multiple short flashes) . . . . . . . . . . . . . . . 25 8.5 example 5: flash pulse longer than 1.5 s . . . . . . . . . . . . . . . . . . . . . . . . . 27 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
schematic description AN2827 4/30 doc id 15047 rev 1 1 schematic description the stcf05 flash led driver has a high operational frequency (1.8 mhz) which allows the use of small-sized external components. **: connect to v i , gnd, sda or scl to choose one of t he four different i2c slave addresses. ***: optional components to support auxiliary functions. figure 3. typical application schematic
AN2827 selection of external components doc id 15047 rev 1 5/30 2 selection of external components 2.1 input and output capacitor selection it is recommended to use ceramic capacitors wi th low esr as input and output capacitors. it is also recommended to use 10 f/6.3 v as a minimum value for the input capacitor, and 1 f/16 v as the optimal value for the output capacitor to achieve a good stability of the device, for a supply range varying from a low input voltage (2.5 v) to the maximum ratings of output power. note: see recommended components in ta b l e 1 . 2.2 inductor selection a thin shielded inductor with a low dc series resistance of winding is recommended for this application. to achieve a good efficiency in step-up mode, we recommend using an inductor with a dc series resistance r dcl = r d / 10 [ ; , 1], where r d is the dynamic resistance of the led [ ; , 1]. for nominal operation, the peak inductor current can be calculated by the formula: i peak = [(i out / ) + (v out - v in ) x v in2 ) / (2 x l x f x v out2 )] x v out / v in where: i peak peak inductor current i out current sourced at the v out -pin efficiency of the stcf05 v out output voltage at the v out -pin v in input voltage at the v bat -pin l inductance value of the inductor f switching frequency note: see recommended components in ta b l e 1 . 2.3 led selection any string of leds with a cumulative forward voltage ranging from 5.3 to 10.2 v is compatible with the stcf05. the total led spread must be taken into account when calculating the minimum and maximum volta ge of the leds that must be inside the 5.3 ?10.2 voltage range. it is possible to set the level of the led current to flash mode and torch mode by setting the corresponding registers through the i2c interface. note: see recommended components in ta b l e 1 . 2.4 ntc and r x resistor selection optionally, the stcf05 uses a negative thermistor (ntc) to sense the led temperature, as well as an r x resistor and an external voltage reference in order to use the ntc feature. refer to figure 3: typical application schematic for more details.
selection of external components AN2827 6/30 doc id 15047 rev 1 once the ntc feature is activated through the i2c, the internal switch connects the r x resistor to the ntc; this creates a voltage divider supplied by the external reference voltage connected to the ntc. if the temperature of the ntc thermistor rises as a result of the heat dissipated by the led, the voltage on the ntc pin increases. when this voltage exceeds 0.56 v, the ntc_w bit in the status register is set to high, and the atn pin is set to low to inform the microcontroller that the led is becoming hot. the ntc_w bit is cleared by reading the status register. if the voltage on the ntc pin rises further and exceeds 1.2 v, the ntc_h bit in the status register is set to high, and the atn pin is set to low to inform the microcontroller that the led is too hot, and the device switches automatically to ready mode to avoid damaging the led. this status is latched until the microcontroller reads the status register. reading the status register clears the ntc_h bit. the selection of the ntc and r x resistor values strongly depends on the power dissipated by the led and all the components surrounding the ntc thermistor, and on the cooling capabilities of each specific application. the r x and ntc values in ta bl e 1 work well for the demonstration board presented in this application note. a real-life application may require a different type of ntc thermistor to achieve optimal thermal protection. the procedure to activate the ntc feature is described in section 5.2: shutdown mode with ntc feature activated . table 1. list of components component manufacturer part number value size c i tdk c1608x5r0j106m 10 f 0603 c o tdk c1608x5r1a105m 1 f 0603 ltdk vlf4014at-1r0n2r2 (1) 1 h 3.7 x 3.5 x 1.2 mm vls252012t-1r0n1r7 (2) 1 h 2.5 x 2 x 1.2 mm ntc murata ncp21wf104j03ra 100 k 0805 r x rohm mcr01mzpj15k 15 k 0402 led luxeon led 2x lxcl-pwf1 0805 auxled rohm sml-210vt 0805 1. used in v2 version to achieve best efficiency. 2. used in v3 version, when low applicat ion area down to 23.9 mm2 is preferred.
AN2827 pcb design doc id 15047 rev 1 7/30 3 pcb design 3.1 pcb design rules the stcf05 is a powerful switching device that operates with low input voltages and a high duty cycle. the pcb must be designed in line with switched mode power supply design rules. the power tracks (or wires on the demonstration board) must be as short as possible and wide enough, because of the large currents involved. it is recommended to use a 4-layer pcb to get the best performance. all external components must be placed as close as possible to stcf05. all high-energy switched loops should be as small as possible to reduce emi. most of the leds need to be cooled efficien tly. this can be achieved by using a dedicated copper area on the pcb. refer to the selected led's reference guide to design the proper heatsink. in case a modification of any pcb layer should be required, it is highly recommended to use enough vias. place the ntc resistor as close as possible to the led for good temperature sensing. a direct conn ection between gnd and pgnd is necessary to achieve a correct output current value. no led current should flow through this track. vias connecting the stcf05 pins to the copper tracks (if used) must be 0.1 mm in diameter. it is recommended to use the filled vias. it is possible to route the stcf05 device with a total pcb area of 23.9 mm2 using the tdk inductor vls252012 1 h value. when using the vlf4014at, the application area is increased by 9.6 mm2, and the efficiency of the application is improved up to 85%.
pcb design AN2827 8/30 doc id 15047 rev 1 3.2 pcb layout 3.2.1 four-layer pcb with 33. 54 mm2 application area using vlf4014at-1r0n2r2 coil figure 4. top layer figure 5. middle layer 1
AN2827 pcb design doc id 15047 rev 1 9/30 figure 6. middle layer 2 figure 7. bottom layer
pcb design AN2827 10/30 doc id 15047 rev 1 figure 8. top overlay
AN2827 pcb design doc id 15047 rev 1 11/30 3.2.2 four-layer pcb with 23. 9 mm2 application area using vls252012t-1r0n1r7 coil figure 9. top layer figure 10. middle layer 1
pcb design AN2827 12/30 doc id 15047 rev 1 figure 11. middle layer 2 figure 12. bottom layer
AN2827 pcb design doc id 15047 rev 1 13/30 figure 13. top overlay
internal registers AN2827 14/30 doc id 15047 rev 1 4 internal registers the stcf05 has four internal registers: command, dimming, aux_led and status. the status register is read-only. the command register can be accessed in any operating mode. all the other registers can be accessed in any mode, except in shutdown mode. when the device enters shutdown mode, the dimming, aux_led and status registers are cleared. the command register value remains untouched when entering shutdown mode. ta bl e 2 shows the accessibility of each register in all operation modes. table 2. accessibility of internal registers register address mode shutdown value power-on reset value shutdown ready torch flash command 00 read/write read/write read/wri te read/write untouched cleared dimming 01 inaccessible read/write read/write read/write cleared cleared aux_led 02 inaccessible read/write read/write read/write cleared cleared status 03 inaccessible read-only read-only read-only cleared cleared
AN2827 operation modes doc id 15047 rev 1 15/30 5 operation modes 5.1 shutdown mode shutdown mode is entered after a power-on reset. this mode is mainly used to decrease the power consumption of the device. during this mode, only the i2c interface is active. the only thing which can be done in shutdown mode is to access the command register. entering shutdown mode by writ ing to the command register will abort any running operation and clear the values of th e dimming, aux_led and status registers. the command register value is not af fected by entering shutdown mode. the following data must be written to the command register to enter shutdown mode. 5.2 shutdown mode with ntc feature activated when this operation mode is activated, the microcontroller can still monitor the ntc voltage through its a/d converter, while the stcf05 remains in shutdown mode and therefore saves power. the following data must be written to the command register to enter shutdown mode with ntc activated. 5.3 ready mode ntc the ready mode allows the user to access all the internal registers. the ntc feature can be activated in this mode and the temperature of the led can be sensed by the a/d converter of the microcontroller. the following data must be written to the command register to enter ready mode. table 3. command register da ta to enter shutdown mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 0xxxxxxx msb lsb table 4. command register data to ente r shutdown mode with ntc activated cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 0xx1xxxx msb lsb table 5. command register data to en ter ready mode with ntc activated cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 1000xxxx msb lsb
operation modes AN2827 16/30 doc id 15047 rev 1 as soon as the ntc feature is activated, the internal switch connects the ntc resistor to the rx resistor, there by creating a voltage divider. the voltage on this divider can be, if desired, monitored by the a/d converter of the microcontroller. an external voltage reference must be connected to the ntc to use this feature. the bits ntc_w and ntc_h of the status register will not be properly set if there is no external reference vo ltage connec ted to the ntc. if the ntc feature is not going to be used, neither the negative thermistor nor the external reference needs to be connected. in this case, it is recommended to ground the rx pin. as the ntc feature is automatically activated during the flash and torch mode, leaving the rx pin floating could lead to unwanted interruptions of the light due to non-defined voltages on the rx pin. 5.4 torch mode this mode is intended to be used for low light intensities. the led current in torch mode can be adjusted in a range from 15 ma up to 120 ma. the torch mode is activated by writing the following data to the command register. the dimming register value (tdim) must be set as well, unless it has already been set during a previous operation. if the tdim register is not set, then the default output current value will be at the minimum. as soon as the torch mode is activated, it remains active until a new mode is entered by writing new data to the command register. if the torch mode was terminated by entering ready or flash mode, it can be restarted by writing the corresponding data to the command register only, because entering any of the ready and flash modes does not influence the tdim value. if the torch mode was terminated by entering shutdown mode, then the tdim value must be set again during the restart of the torch mode because entering the shutdown mode clears the tdim value. as soon as the torch mode is activated, the nt c feature is automatically activated too so as to protect the led from overheating. the nt c feature will be activated even if the ntc_on bit in the command register is set to zero. table 6. command register data to enter ready mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 1001xxxx msb lsb table 7. command register data to enter torch mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 101xxxxx msb lsb
AN2827 operation modes doc id 15047 rev 1 17/30 5.5 flash mode this mode is intended to be used for high light intensities. the led current in flash mode can be adjusted up to 400 ma with the input voltage ranging from 2.5 to 5.5 v. the flash mode is activated by writing the following data to the command register. the dimming register value (fdim) must be written in order to set the desired flash current, while the ftim_0 ~ 3 are used to set a maximum time duration for the flash. values from 0 ~15 correspond to 0 ~1.5 s (100 ms steps). this allows a better safety of the system providing a certain turn-off of the flash even in case of application software problems. the activation of the flash mode requires the tr ig pin to be high. the flash mode is active only when the trig_en bit in the command regi ster is set to 1 and the trig pin is high. this gives the user the possibility to choose betw een a soft and a hard triggering of the flash mode. the soft triggering is done by writing data to the internal registers only, while the trig pin is permanently kept high, for example by connecting it to v bat . this saves one pin of the microcontroller, which can be used for a different purpose, but this way of triggering is less accurate than the hard one. the second disadvantage of this solution is that the flash duration can only be set in discrete steps of the internal timer (1 step = approx. 100 ms). hard triggering of the flash mode requires the microcontroller to manage the trig pin. the command and dimming registers are loaded with data before the trig pin is set to high. this allows the user to avoid the i2c bus latenc y. the flash mode then starts as soon as the trig pin is set to high. it takes typically about 0.7 ms to ramp-up the led current to the adjusted value. this time may vary according to the led current value and the battery voltage. if the trig pin is kept high for more than the ftim value, the internal timer reaches zero and the flash mode is terminated. as soon as the flash is timed out, the atn pin is pulled down for 11 s to inform the microcontroller that the status register has been updated and that the flash is over. if the trig pin is set to low before the internal timer reaches zero, the flash mode will be interrupted and can be restar ted by setting the trig pin high again. the internal timer is stopped while the trig pin is low. this means that the user can split the flash into several pulses of a total length equal to the ftim value. figure 14 shows the splitting of the flash into several shorter pulses. the cumulative length of all the pulses is determined by the ftim value. figure 14 shows the case for ftim = 9 (900 ms flash time). the cumulative time when the trig pin is high is 1000 ms (5 pulses 200 ms long). the last flash pulse w ill be100 ms long only. th e reason is that the internal flash timer reaches zero and the trig_en bit is set to 0. table 8. command register data to enter flash mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 11xxxxxx msb lsb
operation modes AN2827 18/30 doc id 15047 rev 1 hard triggering therefore allows a smooth setting of the flash duration. the resolution is about 8.8 s. the minimum flash duration is limited by the ramp-up time of the led current and the maximum is limited by the ftim value. if it is necessary to make a flash pulse longer then the maximum allowed by ftim, then it is necessary to reload the command register before the internal timer reaches zero (start a new flash before the previous one elapses). see section 8.5: example 5: flash pulse longer than 1.5 s for more details. figure 14. splitting the flash pulse into several shorter pulses trig pin 100 ms 200 ms trig_en bit i2c bus packet 1300 ms led current time when the internal flash timer reaches 0 98765 4321 0 internal flash timer values trig pin 100 ms 200 ms trig_en bit i2c bus packet 1300 ms led current time when the internal flash timer reaches 0 98765 4321 0 internal flash timer values
AN2827 status register and atn pin doc id 15047 rev 1 19/30 6 status register and atn pin refer to the stcf05 datasheet for a detailed description of each bit. when the status register is la tched, reading and writing to the registers is still possible, but the bits trig_en and tch_on in the command register and auxl register cannot be changed until the device is unlatched. it is necessary to read the status register to unlatch the device. the atn pin is also pulled down when the internal timer reaches zero in flash mode. in this case, the atn pin is pulled down for 11 s only. it is recommended to connect the atn pin to the interrupt input of the microcontroller. if it is not connected to the interrupt input, the atn pin should be polled fast enough not to miss the 11 s pulse; for example, by a programming loop which is entered after the st art of flash mode. this loop will run until the atn pin goes low. it is recommended to make a timeout of such a loop. table 9. status register bits bit name led_s f_run led_f ntc_w ntc_h ot_f oc_f voutok_n msb lsb table 10. effect of the status register bits on the operation of the device bit name led_s f_run stat_reg led_o stat_reg ntc_w stat_reg ntc_h stat_reg ot_f stat_reg oc_f stat_reg voutok_n stat_reg default value 0000000 0 latched (1) yes no yes yes yes yes no yes forces ready mode when set no no yes no yes yes no yes sets atn low when set yes no yes yes yes yes no yes 1. yes means that the bit is set by internal signals and is re set to its default value by an i2c read operation of stat_reg. no means that the bit is set and re set by internal signals in real-time.
reading and writing to the stcf05 registers through the i2c bus AN2827 20/30 doc id 15047 rev 1 7 reading and writing to the stcf05 registers through the i2c bus 7.1 writing to a single register writing to a single register starts with a start bit followed by the 7-bit device address of the stcf05. the 8 th bit is the r/w bit, which is 0 in this case. r/w = 1 means a reading operation. the master then waits for an acknowledgement from the stcf05. the 8-bit address of the desired register is sent afterwards to the stcf05. it is also followed by an acknowledge pulse. the last transmitted byte is the data that is going to be written into the register. it is followed again by an acknowledge pulse from the stcf05. the master then generates a stop bit and the communication is over. the whole cycle is represented in figure 15 . 7.2 writing to multiple registers with incremental addressing it would be unpractical to send several times the device address and the address of the register when writing to multiple registers. the stcf05 supp orts writing to multiple registers with incremental addressing. when data is written to a register, the register address is automatically incremented (by one), and therefore the next data can be sent without resending the device address and the register address (see figure 16 ). figure 15. writing to a single register s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register data a c k a c k s t o p m s b m s b l s b l s b sda line s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register data a c k a c k s t o p m s b m s b l s b l s b s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register data a c k a c k s t o p m s b m s b l s b l s b sda line
AN2827 reading and writing to the stcf05 registers through the i2c bus doc id 15047 rev 1 21/30 7.3 reading from a single register the reading operation starts with a start bit followed by the 7-bit device address of the stcf05. the 8 th bit is the r/w bit, which is 0 in this case. the stcf05 confirms the receiving of the address + r/w bit by an acknowledge pulse. the address of the register which should be read is then sent and confirmed by another acknowledge pulse from the stcf05. the master then generates another start bit and sends the device address followed by the r/w-bit, which is now 1. the stcf05 confirms the receiving of the address + r/w-bit by an acknowledge pulse, and starts to send data to the master. no acknowledge pulse from the master is required after receiving the data. the master then generates a stop bit to terminate the communication. figure 16. writing to multiple register s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register i data i a c k a c k s t o p m s b m s b l s b l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n a c k m s b m s b m s b m s b m s b a c k l s b sda line s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register i data i a c k a c k s t o p m s b m s b l s b l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n a c k m s b m s b m s b m s b m s b a c k l s b s t a r t device address 7 bits a c k w r i t e m s b l s b r / w a c k address of register i data i a c k a c k s t o p m s b m s b l s b l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n a c k m s b m s b m s b m s b m s b a c k l s b sda line figure 17. reading from a single register s t a r t device address 7 bits a c k w r i t e m s b l s b r / w address of register a c k m s b l s b s t a r t a c k r / w r e a d device address 7 bits data l s b s t o p n o a c k sda line s t a r t device address 7 bits a c k w r i t e m s b l s b r / w address of register a c k m s b l s b s t a r t a c k r / w r e a d device address 7 bits data l s b s t o p n o a c k sda line
reading and writing to the stcf05 registers through the i2c bus AN2827 22/30 doc id 15047 rev 1 7.4 reading from multiple registers with incremental addressing reading from multiple registers starts in the same way as reading from a single register. as soon as the first register is read, the register address is automatically incremented. if the master generates an acknowledge pulse after receiving the data from the first register, then reading from the next register can start immediately without having to resend the device and register addresses. the last acknowledge pulse before the stop bit is not required. figure 18. reading from multiple registers s t a r t device address 7 bits a c k w r i t e m s b l s b r / w address of register i a c k m s b l s b s t a r t a c k r / w r e a d device address 7 bits data i a c k s t o p l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n m s b m s b m s b m s b a c k l s b n o a c k sda line s t a r t device address 7 bits a c k w r i t e m s b l s b r / w address of register i a c k m s b l s b s t a r t a c k r / w r e a d device address 7 bits data i a c k s t o p l s b data i+1 a c k l s b data i+2 a c k l s b data i+2 l s b data i+n m s b m s b m s b m s b a c k l s b n o a c k sda line
AN2827 examples of register setup for each mode doc id 15047 rev 1 23/30 8 examples of register setup for each mode 8.1 example 1: 400 ma fl ash with 700 ms duration the value of fdim (4 bits) must be set to 0x7 to set-up the current source to the chosen value ( ta b l e 1 1 ). the flash duration timer can be set from 100 ms up to 1500 ms in 100 ms steps. if the desired flash duration is 700 ms the ftim value (4 bits) must be se to 0x7. the pwr_on bit of the command register must be set to 1. the trig_en bit of the command register must be set to 1. the tch_on bit of the command register must be set to 0. the ntc_on bit of the command register can be set to any value because ntc is automatically on when the flash mode is active . setting this bit to 0 will not switch off the ntc. four bytes must be written to the stcf05 to make a flash. table 11. torch and flash mode dimming register settings ldim (hex) 0 1 2 3 4 5 6 7 8 9 a b c tdim (hex) 0 1 2 3 4 5 6 7 fdim(hex) 0 1 2 3 4 5 6 7 led current [ma] 15 20 30 45 60 75 90 120 160 200 240 320 400 internal step 12345678910111213 table 12. command register data to enter flash mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 11xx0111 msb lsb table 13. dimming register data for flash mode dim_reg n/a tdim_2 tdim_1 tdim_0 n/a fdim_2 fdim_1 fdim_0 00000111 msb lsb table 14. i2c data packet for activating flash mode byte hex binary comment 1 62 01100010device address + r/w bit 2 00 00000000command register address 3 d7 11010111data of the command register 4 07 00000111data of the dimming register
examples of register setup for each mode AN2827 24/30 doc id 15047 rev 1 8.2 example 2: 15 ma torch the value of tdim (4 bits) must be set to 0x0 to set-up the current source to the chosen value. the pwr_on bit of the command register must be set to 1. the trig_en bit of the command register must be set to 1. the tch_on bit of the command register must be set to 0. the ntc_on bit of the command register can be set to any value because ntc is automatically on when the torch mode is active . setting this bit to 0 will not switch off the ntc. four bytes must be written to the stcf05 to run the torch mode. the duration of the torch mode is "unlimited". torch mode is terminated by setting the tch_on bit in the command register to 0. termination of the torch mode can be done by writing the following data to the stcf05. terminating torch mode puts the stcf05 into ready mode. table 15. command register data for torch mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 10110000 msb lsb table 16. dimming register data for torch mode dim_reg n/a tdim_2 tdim_1 tdim_0 n/a fdim_2 fdim_1 fdim_0 00000000 msb lsb table 17. i2c data packet to activate torch mode byte hex binary comment 1 62 01100010device address + r/w bit 2 00 00000000command register address 3 b0 10110000data of the command register 4 00 00000000data of the dimming register table 18. i2c data packet for terminating torch mode byte hex binary comment 1 62 01100010device address + r/w bit 2 00 00000000command register address 3 80 10000000data of the command register
AN2827 examples of register setup for each mode doc id 15047 rev 1 25/30 8.3 example 3: auxiliary led running at 10 ma for 500 ms the stcf05 must be in ready mode (both trig_en and tch_on set to 0) to activate the auxiliary led. a 10 ma output current will be re ached when auxi is set to 0x8. auxt must be set to 0x5 to obtain a 500 ms duration of the auxiliary led lighting. writing the following three bytes to the stcf05 puts the device into ready mode. this can be skipped if ready mode is already activated. writing the following three byte s to the stcf05 activates th e auxiliary led for the desired time. 8.4 example 4: red-eye reduct ion (multiple short flashes) there are two ways of reducing red eye. the first one is to use hardware triggering of the flashes through the trig pin. this is the most suitable and recommended solution, as it reduces the usage of the i2c bus and the length of each flash pulse can be adjusted continuously. the second solution is to use the software triggering feature, which means a periodical reloading of the co mmand register. this will however increase traffic on the i2c bus and the flashes can only have a set length, adjustable in 100 ms steps only. table 19. command register data for aux_led cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 10000000 msb lsb table 20. aux_led register data aux_led auxi_3 auxi_2 auxi_1 auxi_0 auxt_3 auxt_2 auxt_1 auxt_0 10000101 msb lsb table 21. i2c data packet for activating ready mode byte hex binary comment 1 62 01100010 device address + r/w bit 2 00 00000000 command register address 3 80 10000000 data of the command register table 22. i2c data packet for activating aux_led byte hex binary comment 1 62 01100010 device address + r/w bit 2 02 00000010 aux iliary led register address 3 85 10000101 data of the auxiliary led register
examples of register setup for each mode AN2827 26/30 doc id 15047 rev 1 suppose the targeted value of the flash current is 400 ma. the task is to make five flashes of 200 ms each with a pause of 100 ms between each one. the setting of the reference voltage is identical to the one in example 1 . the flash timer (ftim) will be set to 0xf, which represents 1.5 s. ta bl e 2 5 shows the data packet to be sent. figure 19 shows the trig pin and the i2c bus timings. table 23. command register data for flash mode cmd_reg pwr_on trig_en tch_on ntc_on ftim_3 ftim_2 ftim_1 ftim_0 11011111 msb lsb table 24. dimming register data for flash mode dim_reg n/a tdim_2 tdim_1 tdim_0 n/a fdim_2 fdim_1 fdim_0 00000111 msb lsb table 25. i2c data packet for activating flash mode byte hex binary comment 1 62 01100010 device address + r/w bit 2 00 00000000 command register address 3 df 11011111 data of the command register 4 07 00000111 data of the dimming register figure 19. multiple flashes handled by trig pin trig pin 100 ms 200 ms trig_en bit i2c bus packet 1400 ms trig pin 100 ms 200 ms trig_en bit i2c bus packet 1400 ms
AN2827 examples of register setup for each mode doc id 15047 rev 1 27/30 8.5 example 5: flash pulse longer than 1.5 s suppose the targeted value of the flash current is 240 ma. the task is to make a single flash pulse with a 4-second duration. ftim must be reloaded into the command register before the internal flash timer reaches zero. this guarantees that the flash will continue and not stop after 1.5 seconds. the first packet must also contain the dimming re gister data if this data is different from that which was used in the previous operation. packet 1 sets flash mode with a 1.5 s duration and the proper dimming. packet 2 sets flash mode with a 1.5 s duration. dimming data is not reset since it is the same as for packet 1 . packet 3 sets flash mode with a 1.5 s duration. dimming remains the same. packet 4 sets flash mode with a 1 s duration. dimming remains the same. table 26. i2c data packet for activating flash mode byte hex binary comment 1 62 01100010 device address + r/w bit 2 00 00000000 command register address 3 df 11011111 data of the command register 4 05 00000101 data of the dimming register table 27. 2 nd i2c data packet for restart of flash mode byte hex binary comment 1 62 01100010 device address + r/w bit 2 00 00000000 command register address 3 df 11011111 data of the command register table 28. 3 rd i2c data packet for restart of flash mode byte hex binary comment 1 62 01100010 device address + r/w bit 2 00 00000000 command register address 3 df 11011111 data of the command register
examples of register setup for each mode AN2827 28/30 doc id 15047 rev 1 figure 20 provides more details on the timing of the i2c bus packets. the solution described in example 5 uses a software termination of the flash pulse (it is timed out by the internal timer.) the flash pulse could also be terminated by setting the trig pin to low after 4 seconds. in this case, the fourth packet could be the same as packets 2 and 3, because the timing of the flash is done by the trig pin and it is not necessary to change the value of ftim in the command register. this method of periodical reloading of the command register can be used to achieve a continuous flash light. however, it is highly recommended to guarantee an efficient cooling of both the led and the chip, otherwise the light can be interrupted by activation of the thermal protections. table 29. 4 th i2c data packet to restart flash mode byte hex binary comment 1 62 01100010 device address + r/w bit 2 00 00000000 command register address 3 da 11011010 data of the command register figure 20. timing of i2c bus packets for a flash lasting longer than ftim max 1.0s 1.5s 1.5s 4.0s trig pin trig_en bit i2c bus packets timeout of the first flash timeout of the second flash timeout of the third flash timeout of the fourth flash ? ending of the whole flash pulse 1.5s 1.0s 1.0s 1.0s 1.0s 1.0s 1.5s 1.5s 4.0s trig pin trig_en bit i2c bus packets timeout of the first flash timeout of the second flash timeout of the third flash timeout of the fourth flash ? ending of the whole flash pulse 1.5s 1.0s 1.0s 1.0s 1.0s
AN2827 revision history doc id 15047 rev 1 29/30 9 revision history table 30. document revision history date revision changes 10-jun-2009 1 initial release.
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